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PCIDEV structure

Many PCI library calls use an instance of this structure to pass parameters to library calls and to return values from the PCI configuration space.


typedef struct {
    WORD wBusNum;
    WORD wDeviceNum;
    WORD wFunction;
    WORD wVendorId;
    WORD wDeviceId;
    WORD wDeviceIndex;
    WORD wClassId;
    BYTE byInterfaceId;
    BYTE byRevId;
    BYTE byCLS;
    BYTE byLatency;
    DWORD dwBaseAddr[6];
    DWORD dwCIS;
    WORD wSubSystemVendorId;
    WORD wSubSystemId;
    DWORD dwRomBaseAddr;
    BYTE byIntLine;
    BYTE byIntPin;
    BYTE byMaxLatency;
    BYTE byMinGrant;
    BYTE byHeaderType;
    BYTE byCapsPtr;
    char szName[40];
    BYTE bUnusable;
    char _res[39];
    char szSlot[8];
    struct space IoSpace[12];
    LPVOID pDrvData;
    BYTE MsiOffset;
    WORD MsixOffset;

Input fields
See the relevant PCI library calls for a description.
The PCI bus number for the device.
The PCI device number for the device.
The PCI function number for the device.
The PCI Vendor ID for the device.
The PCI Device ID for the device.
This field is used to locate a device using PciFindDevice/PciFindClass. Refer to those calls for details of their usage.

Output fields
wClassId, byInterfaceId, byRevId, byCLS, byLatency, dwBaseAddr[6], dwCIS, wSubSystemVendorId, wSubSystemId, dwRomBaseAddr, byIntLine, byIntPin, byMaxLatency, byMinGrant, byHeaderType, byCapsPtr

These fields are copies of the PCI version 2.1 registers read from a given PCI device configuration header by the PciReadHeader and PciFindDevice calls. For further details, see the PCI Local bus specification version 2.1.

Derived fields
These fields contain information derived from the PCI header fields.
May contain a null-terminated text description of the device.
A Boolean flag which indicates whether the PCI device has been assigned to INtime. If this field contains the value TRUE then the device is not available for use by INtime and an attempt to install an interrupt handler for this device will likely fail.
Reserved for future use.
Contains a null-terminated string containing the PCI bus address of the device, in the format bus:device.function.
An array that contains the decoded Base Address Registers (BARs). All decoding of the information is performed and reflected in each element of the array. Each element corresponds to the equivalent BAR, and has the following format:
struct space {
    DWORD start;
    DWORD size;
    DWORD flags;
    struct space *parent, *sibling, *child;
The fields are defined as follows:
start The base physical address of the space described by the BAR. The type of space (memory or I/O) is indicated in the flags field.
size The size of the address space indicated by the BAR.
flags A mask which indicates the type and capabilities of the corresponding BAR. This may contain one or more of the following flags:
IOSPACE_IO The space described resides in I/O space.
IOSPACE_MEM The space described resides in memory space.
IOSPACE_PREFETCH The memory space described is pre-fetchable (see the PCI specification for details).
IOSPACE_READONLY The memory space described is not writable.
IOSPACE_CACHEABLE The memory space described is cacheable.
IOSPACE_64BIT The memory space described is a 64-bit space, and cannot be decoded in this structure.
Call PciGetExtendedAddressSpace to decode 64-bit BARs.
parent, sibling, child Reserved for future internal use.
Reserved for internal use.
The offset in the PCI header of the MSI capability registers; contains 0 (zero) if no MSI capability.
The offset in the PCI header of the MSI-X capability registers, contains 0 (zero) if no MSI-X capability.
See Also